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	DDCA Ch6 - Part 22: RISC-V Compressed Instructions (Sarah Harris) View
	DDCA Ch6 - Part 21: Signed and Unsigned RISC-V Instructions (Sarah Harris) View
	DDCA Ch6 - Part 23: RISC-V Floating-Point Instructions (Sarah Harris) View
	DDCA Ch6 - Part 5: RISC-V Immediates (Constants) (Sarah Harris) View
	DDCA Ch6 - Part 20: Endianness (Sarah Harris) View
	DDCA Ch6 - Part 18: Translating Machine Code (Sarah Harris) View
	DDCA Ch6 - Part 15: Machine Language (Sarah Harris) View
	DDCA Ch6 - Part 17: Immediate Encodings (Sarah Harris) View
	DDCA Ch6 - Part 7: Multiplication u0026 Division Instructions (Sarah Harris) View
	Adding C Extension to RISC-V RV32I (FPGA Implementation) (Jin-Lien Lin) View